[Bug rtl-optimization/123380] [15/16 Regression] ICE: in gen_rtx_SUBREG, at emit-rtl.cc:1048 with -O2 and _Float16

[law at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123380

--- Comment #3 from Jeffrey A. Law <law at gcc dot gnu.org> ---
Things seem to go wrong as we create insn 14:

;; vect__4.9_18 = (vector(2) long int) vect__3.8_9;

(insn 14 13 0 (set (reg:RVVM1DI 141 [ vect__4.9 ])
        (sign_extend:RVVM1DI (subreg:RVVMF4HI (reg/v:DI 152 [ x ]) 0)))
"j.c":6:8 -1
     (nil))


That later gets split into:


(insn 25 24 0 (set (reg:RVVM1DI 141 [ vect__4.9 ])
        (if_then_else:RVVM1DI (unspec:RVVMF64BI [
                    (const_vector:RVVMF64BI [
                            (const_int 1 [0x1]) repeated x2
                        ])
                    (reg:DI 160)
                    (const_int 1 [0x1]) repeated x3
                    (reg:SI 66 vl)
                    (reg:SI 67 vtype)
                ] UNSPEC_VPREDICATE)
            (sign_extend:RVVM1DI (subreg:RVVMF4HI (reg/v:DI 152 [ x ]) 0))
            (unspec:RVVM1DI [
                    (reg:DI 0 zero)
                ] UNSPEC_VUNDEF))) -1
     (nil))

Then we go into a loop trying to reload the input to the sign_extend.