[Bug rtl-optimization/124955] Improve code generation for leela's random number generation

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=124955

Drea Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
     Ever confirmed|0                           |1
   Last reconfirmed|                            |2026-04-21
             Status|UNCONFIRMED                 |NEW

--- Comment #1 from Drea Pinski <pinskia at gcc dot gnu.org> ---
GCC (and LLVM) for aarch64 produces:
```
        lsl     w0, w0, 12
        and     w0, w0, -8192
```


Trying 10, 6 -> 11:
   10: r142:DI=0xffffffffffffe000
    6: r138:DI=sign_extend(r136:DI#0<<0xc)
      REG_DEAD r136:DI
   11: r141:DI=r138:DI&r142:DI
      REG_DEAD r142:DI
      REG_DEAD r138:DI
      REG_EQUAL r138:DI&0xffffffffffffe000
Failed to match this instruction:
(set (reg:DI 141)
    (and:DI (ashift:DI (sign_extract:DI (reg/v:DI 136 [ s1 ])
                (const_int 20 [0x14])
                (const_int 0 [0]))
            (const_int 12 [0xc]))
        (const_int -8192 [0xffffffffffffe000])))

Can't we push the and past the shift and then into the sign_extract.

So that becomes
(ashift:DI (sign_extract:DI (reg/v:DI 136 [ s1 ])
                            (const_int 18 [0x14])
                            (const_int 2 [0]))
             (const_int 2 [0]))


Hopefully I did my math correctly.