[Bug target/121959] riscv: vector sign extend instead of zero extend

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121959

--- Comment #6 from Richard Biener <rguenth at gcc dot gnu.org> ---
(In reply to Robin Dapp from comment #5)
> AFAICT using a signed intermediate type for subtraction (and subsequent
> sign extension) is correct.
[..]

OK.

> I see three (unsatisfactory) options:
[...]
>  - Exploit that left shift of negative values is undefined behavior.

You can definitely not rely on this in the middle-end.

> Richi, do you happen to have any insight still?

So what do we want?  RVV can do a widen subtract-and-shift?  If not,
we're stuck with signed short subtract (possibly a widening uchar subtract
if that exists?) and a widen left shift.

I can't see how one could argue that a[0] == 0, b[0] == 5, aka -5 << 16
would be invalid.  In particular in C++ this is well-defined.