[Bug rtl-optimization/101882] [16 Regression] combine vs. insn with earlyclobber and input and output set to a hard register

[xry111 at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101882

--- Comment #21 from Xi Ruoyao <xry111 at gcc dot gnu.org> ---
(In reply to Segher Boessenkool from comment #20)
> (In reply to Peter Bergner from comment #17)
> > The reason operands 0, 1 and 4 all use the register r23, is that each
> > operand is using the same pseudo, coming from variable "x", which is a user
> > defined hard register:
> > 
> >    register long x asm ("s0");
> 
> So, user error.

The user cannot anticipate what the RTL will become like after optimization
passes at all.

So it means the user just *cannot* use defined hard register in the code at
all, as long as the machine description has an earlyclobber?  That would just
seem insane.

Or would we need to add the checks like
https://gcc.gnu.org/pipermail/gcc-patches/2025-July/688634.html for every insn
having an earlyclobber?  That would seem insane too IMO.