[Bug rtl-optimization/101882] [16 Regression] combine vs. insn with earlyclobber and input and output set to a hard register

[xry111 at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101882

--- Comment #15 from Xi Ruoyao <xry111 at gcc dot gnu.org> ---
(In reply to Segher Boessenkool from comment #14)
>                   (match_operand:DI 1 "register_operand" "r0")
> 
> That means either a general register ("r"), or the same thing as operand 0
> (that's what "0" means)!
> 
> So the backend explicitly allows it here.

The problem is operand 4 does not have "0", and it's also assigned the hard
register r23.  It's fine for operand 0 and 1 to be the same, also for operand 1
and 4 to be the same, but operand 0 and 4 cannot be same.  Thus this combine
breaks the code.