[Bug target/115458] [15 regression] [RISC-V] ICE in lra_split_hard_reg_for, at lra-assigns.cc:1868 unable to find a register to spill since r15-518-g99b1daae18c095

[law at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115458

--- Comment #7 from Jeffrey A. Law <law at gcc dot gnu.org> ---
Bisection of the reduced case landed here for me:

commit acc22d56e140220e7dc6c138918cb6754b6d1c0b (HEAD)
Author: Yanzhang Wang <yanzhang.wang@intel.com>
Date:   Thu Jan 25 21:06:09 2024 +0800

    RISC-V: remove param riscv-vector-abi. [PR113538]

    Also adjust some of the tests for scan-assembly. The behavior is the
    same as --param=riscv-vector-abi before.

    gcc/ChangeLog:

            PR target/113538
            * config/riscv/riscv.cc (riscv_get_arg_info): Remove the flag.
            (riscv_fntype_abi): Ditto.
            * config/riscv/riscv.opt: Ditto.
[ ... ]