[Bug target/118945] RISC-V: VSETL pass: Don't promote Vectors ops from Tail agnostic to Tail Undisturbed

[juzhe.zhong at rivai dot ai]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118945

--- Comment #2 from JuzheZhong <juzhe.zhong at rivai dot ai> ---
I have thought about this long time ago while I am working on supporting RVV on
upstream GCC.

https://github.com/riscv-non-isa/riscv-toolchain-conventions/issues/37

I suggested we should have -mprefer-agnostic in RISC-V psabi.

When this option is allowed, the problem can be solved very easily:


/* Get prefer tail policy.  */
enum tail_policy
get_prefer_tail_policy ()
{
  /* TODO: By default, we choose to use TAIL_ANY which allows
     compiler pick up either agnostic or undisturbed. Maybe we
     will have a compile option like -mprefer=agnostic to set
     this value???.  */
  return TAIL_ANY;
}

/* Get prefer mask policy.  */
enum mask_policy
get_prefer_mask_policy ()
{
  /* TODO: By default, we choose to use MASK_ANY which allows
     compiler pick up either agnostic or undisturbed. Maybe we
     will have a compile option like -mprefer=agnostic to set
     this value???.  */
  return MASK_ANY;
}

in riscv-v.cc. I have already leave a TODO here.