[Bug target/117955] [15 Regression] GCC generate illegal riscv instruction `vsetvli zero,zero,e64,mf4,ta,ma` with -O2 and -O3
kito at gcc dot gnu.org
gcc-bugzilla@gcc.gnu.org
Tue Feb 4 02:17:28 GMT 2025
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117955
--- Comment #4 from Kito Cheng <kito at gcc dot gnu.org> ---
I can't reproduce that by the top of trunk with your option, could you check
does the bug still can be reproduced by trunk?
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