[Bug target/123274] [16 Regression] ICE: in extract_insn, at recog.cc:2888 (unrecognizable insn: mult:DI) with -O2 -march=rv64id and __builtin_mul_overflow()

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123274

--- Comment #3 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Jeff Law <law@gcc.gnu.org>:

https://gcc.gnu.org/g:758876f023a58b9a02f350347b58d4e116a448bc

commit r16-6370-g758876f023a58b9a02f350347b58d4e116a448bc
Author: Jeff Law <jeffrey.law@oss.qualcomm.com>
Date:   Tue Dec 23 13:25:47 2025 -0700

    [committed][RISC-V][PR target/123274] Add missing condition in usmul<mode>3
pattern

    As Andrew P. noted in the BZ, the expander is missing elements in its
condition
    leading to generation of an insn that can't be matched.

    This adds the necessary condition to the usmul<mode>3 expander which in
turn
    fixes the ICE.  I just checked and that expander wansn't in gcc-15, so this
is
    just a gcc-16 issue.

    Tested on riscv32-elf and riscv64-elf.  I have a bootstrap in flight on the
    Pioneer, but I'm not expecting any surprises.  Much like the patch earlier
    today, I'm going to push this now rather than wait for pre-commit CI.

            PR target/123274
    gcc/
            * config/riscv/riscv.md (usmul<mode>3): Add proper condition.

    gcc/testsuite/
            * gcc.target/riscv/pr123274.c: New test.