[Bug target/122769] RISC-V: Short branch can be elided for alu op

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122769

--- Comment #16 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Vineet Gupta <vineetg@gcc.gnu.org>:

https://gcc.gnu.org/g:2a84a753afcf376a5fc0339c5ce228c130000cd7

commit r16-6332-g2a84a753afcf376a5fc0339c5ce228c130000cd7
Author: Vineet Gupta <vineetg@rivosinc.com>
Date:   Mon Dec 22 08:54:06 2025 -0800

    ifcvt: cond zero arith: elide short forward branch for signed GE 0
comparison [PR122769]

                 Before            After
          ---------------------+----------------------
            bge a0,zero,.L2    | slti      a0,a0,0
                               | czero.eqz a0,a0,a0
            xor a1,a1,a3       | xor       a0,a0,a0
          .L2                  |
            mv  a0,a1          |
            ret                | ret

    This is what all the prev NFC patches have been preparing to get to.

    Currently the cond arith code only handles EQ/NE zero conditions missing
    ifcvt optimization for cases such as GE zero, as show in example above.
    This is due to the limitation of noce_emit_czero () so switch to
    noce_emit_cmove () which can handle conditions other than EQ/NE and
    if needed generate additional supporting insns such as SLT.

    This also allows us to remove the constraint at the entry to limit to EQ/NE
    conditions, improving ifcvt outcomes in general.

            PR target/122769

    gcc/ChangeLog:

            * ifcvt.cc (noce_try_cond_zero_arith): Use noce_emit_cmove.
            Delete noce_emit_czero () no longer used.

    gcc/testsuite/ChangeLog:

            * gcc.target/riscv/pr122769.c: New test.

    Co-authored-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
    Signed-off-by: Vineet Gupta <vineetg@rivosinc.com>