[Bug target/123149] Missed optimization: GCC doesn't generate AVX512VL rotate instructions for SSE2/AVX2 or/shift/shift

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123149

--- Comment #4 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(In reply to Andrew Pinski from comment #3)
> Trying 9, 7 -> 11:
>     9: r107:V4SI=r105:V2DI#0<<0x5
>       REG_DEAD r105:V2DI
>     7: r106:V4SI=r105:V2DI#0 0>>0x1b
>    11: r109:V2DI=r106:V4SI#0^r107:V4SI#0
>       REG_DEAD r107:V4SI
>       REG_DEAD r106:V4SI
> Failed to match this instruction:
> (set (reg:V2DI 109 [ _3 ])
>     (xor:V2DI (subreg:V2DI (ashift:V4SI (subreg:V4SI (reg/v:V2DI 105 [ v ])
> 0)
>                 (const_int 5 [0x5])) 0)
>         (subreg:V2DI (lshiftrt:V4SI (subreg:V4SI (reg/v:V2DI 105 [ v ]) 0)
>                 (const_int 27 [0x1b])) 0)))

Looks like the subreg is getting in the way to detecting this as a rotate.