[Bug target/122552] RISC-V: Cannot combine vector shift like vsll.vv to vsll.vx

[pan2.li at intel dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122552

--- Comment #3 from Li Pan <pan2.li at intel dot com> ---
(In reply to Jeffrey A. Law from comment #2)
> So this is the code I'm currently getting on the trunk:
> 
> vsll_vx_0:
>         beq     a3,zero,.L8     # 9     [c=16 l=4]  *branchdi
>         zext.w  a3,a3   # 12    [c=4 l=4]  *zero_extendsidi2_bitmanip/0
>         zext.w  a2,a2   # 35    [c=4 l=4]  *zero_extendsidi2_bitmanip/0
> .L3:
>         vsetvli a5,a3,e64,m1,ta,ma      # 64    [c=0 l=4]  vsetvldi
>         vle64.v v1,0(a1)        # 16    [c=4 l=4]  *pred_movrvvm1di/1
>         sub     a3,a3,a5        # 22    [c=4 l=4]  subdi3
>         sh3add  a1,a5,a1        # 20    [c=4 l=4]  *shNadd
>         vsll.vx v1,v1,a2        # 49    [c=4 l=4]  pred_ashlrvvm1di_scalar/2
>         vse64.v v1,0(a0)        # 19    [c=4 l=4]  pred_storervvm1di
>         sh3add  a0,a5,a0        # 21    [c=4 l=4]  *shNadd
>         bne     a3,zero,.L3     # 24    [c=16 l=4]  *branchdi
> 
> 
> Note the vsll.vx, so it seems to me like this is working.   So is there's a
> need to keep this open?  Am I missing something?

It will always be vsll.vx from the output asm, but we expect it should be
vsll.vx when gpr2vr-cost is 0 and vsll.vv when gpr2vr-cost is 2.
Unfortunately, the shift stmt during expand is VX form, so we cannot perform
the combine from RTL.