[Bug target/117675] [14/15 regression] ARM Cortex 7-A ldrd register overlap

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117675

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(define_insn "arm_atomic_loaddi2_ldrd"
  [(set (match_operand:DI 0 "register_operand" "=r")
        (unspec_volatile:DI
          [(match_operand:DI 1 "memory_operand" "m")]
            VUNSPEC_LDRD_ATOMIC))]
  "ARM_DOUBLEWORD_ALIGN && TARGET_HAVE_LPAE"
  "ldrd\t%0, %H0, %1"
)


Maybe "=r" needs to be "=&r" but I could be wrong.