[Bug target/116111] RISC-V: 'd' extension allowed with -mabi=ilp32e

[kito at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116111

Kito Cheng <kito at gcc dot gnu.org> changed:

           What    |Removed                     |Added
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                 CC|                            |kito at gcc dot gnu.org

--- Comment #2 from Kito Cheng <kito at gcc dot gnu.org> ---
Cross post my reply here:

In short: Yeah, I think it's a GCC bug, but I am not sure what's the right
direction to fix that either.

Longer version: I feel a responsibility to tell this story since I am one of
the main authors of the GCC implementation and the author of the psABI ilp32e
draft*1. With many new friends joining the RISC-V development, it's time to
talk about some history here.

First, RV32E was not supported for use with F and D[1]. Therefore, the design
of ilp32e did not consider the alignment of the `fld` instruction at all. The
only goal of RV32E was to minimize the memory footprint, so the stack alignment
was set to 4 bytes.

The constraints for the E extension have been relaxed, so we should update the
`ilp32e` draft. A few ideas have been proposed in the past years: 1) increasing
the stack alignment to 8 bytes or 16 bytes, or 2) adding new ABI variants like
`ilp32ef` and `ilp32ed`, while also restricting `ilp32e` to be used only
without D.

BUT...not enough people are interested in the `ilp32e` ABI, so it's been stuck
for a while.

Lastly, here is a call for help. Let me know if anyone is interested in the
`ilp32e` and/or `lp64e` ABI. Since the E extension has become ratified, we
should move this forward.

*1 Yes, ilp32e is still under draft status. One major reason is that rv32e was
under version 1.9 for a long time, which meant it could still change. rv32e
became version 2.0 last year[3].

[1] Relax the constraint of the E extension, allowing rv64e and combinations
with F and D extensions.
https://github.com/riscv/riscv-isa-manual/commit/4845f5d61f96a827ec4d21d2c5a80b6bf7881e56
[2] Bump version from 1.9 to 1.95
https://github.com/riscv/riscv-isa-manual/commit/ec4919caf5638e2d1c437391c6eab097e038aaec
[3] Bump version from 1.95 to 2.0
https://github.com/riscv/riscv-isa-manual/commit/fefbe61f8ffa04d6942fc5493ef65f3f66e48170