[Bug rtl-optimization/116096] [15 Regression] during RTL pass: cprop_hardreg ICE: in extract_insn, at recog.cc:2848 (unrecognizable insn ashift:TI?) with -O2 -flive-range-shrinkage -fno-peephole2 -mstackrealign

[liuhongt at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116096

Hongtao Liu <liuhongt at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |liuhongt at gcc dot gnu.org

--- Comment #2 from Hongtao Liu <liuhongt at gcc dot gnu.org> ---
(In reply to Andrew Pinski from comment #1)
> This is interesting.
> 
> After reload we have:
> ```
> (insn 450 93 97 2 (set (reg:QI 2 cx [521])
>         (reg:QI 38 r10 [521])) "/app/example.cpp":11:13 91 {*movqi_internal}
>      (nil))
> (insn 97 450 385 2 (parallel [
>             (set (reg:TI 4 si [orig:337 _32 ] [337])
>                 (ashift:TI (const_int 1671291085 [0x639de0cd])
>                     (reg:QI 2 cx [521])))
>             (clobber (reg:CC 17 flags))
>         ]) "/app/example.cpp":11:13 953 {ashlti3_doubleword}
>      (expr_list:REG_EQUIV (mem:TI (plus:DI (reg/f:DI 19 frame)
>                 (const_int -80 [0xffffffffffffffb0])) [2  S16 A128])
>         (expr_list:REG_EQUAL (ashift:TI (const_int 1671291085 [0x639de0cd])
>                 (reg:QI 38 r10 [521]))
>             (nil))))
> ```
It should be already invalid insn after reload since 1671291085 is not
reg_or_pm1_operand, guess reload have't check predicate, but only check for
constaint?

14775(define_insn "ashl<mode>3_doubleword"
14776  [(set (match_operand:DWI 0 "register_operand" "=&r,&r")
14777        (ashift:DWI (match_operand:DWI 1 "reg_or_pm1_operand" "0n,r")
14778                    (match_operand:QI 2 "nonmemory_operand" "<S>c,<S>c")))

Before reload it's ok

I'm testing below which can fix the issue.

3537(insn 98 94 387 2 (parallel [
3538            (set (reg:TI 337 [ _32 ])
3539                (ashift:TI (reg:TI 329)
3540                    (reg:QI 521)))
3541            (clobber (reg:CC 17 flags))
3542        ]) "test.c":11:13 953 {ashlti3_doubleword}

diff --git a/gcc/config/i386/constraints.md b/gcc/config/i386/constraints.md
index 7508d7a58bd..e1d70162b88 100644
--- a/gcc/config/i386/constraints.md
+++ b/gcc/config/i386/constraints.md
@@ -225,9 +225,8 @@ (define_constraint "Bz"

 (define_constraint "BC"
   "@internal integer SSE constant with all bits set operand."
-  (and (match_test "TARGET_SSE")
-       (ior (match_test "op == constm1_rtx")
-           (match_operand 0 "vector_all_ones_operand"))))
+  (ior (match_test "op == constm1_rtx")
+       (match_operand 0 "vector_all_ones_operand")))

 (define_constraint "BF"
   "@internal floating-point SSE constant with all bits set operand."
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 6207036a2a0..9c4e847fba1 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -14774,7 +14774,7 @@ (define_insn_and_split "*ashl<dwi>3_doubleword_mask_1"

 (define_insn "ashl<mode>3_doubleword"
   [(set (match_operand:DWI 0 "register_operand" "=&r,&r")
-       (ashift:DWI (match_operand:DWI 1 "reg_or_pm1_operand" "0n,r")
+       (ashift:DWI (match_operand:DWI 1 "reg_or_pm1_operand" "0BC,r")
                    (match_operand:QI 2 "nonmemory_operand" "<S>c,<S>c")))
    (clobber (reg:CC FLAGS_REG))]
   ""