[Bug target/115969] [15 regression] ICE when building clang-16.0.6 on arm64 (output_operand: invalid expression as operand)

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115969

--- Comment #9 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The trunk branch has been updated by Richard Sandiford <rsandifo@gcc.gnu.org>:

https://gcc.gnu.org/g:ebde0cc101a3b26bc8c188e0d2f79b649bacc43a

commit r15-2197-gebde0cc101a3b26bc8c188e0d2f79b649bacc43a
Author: Richard Sandiford <richard.sandiford@arm.com>
Date:   Mon Jul 22 16:42:15 2024 +0100

    aarch64: Tighten aarch64_simd_mem_operand_p [PR115969]

    aarch64_simd_mem_operand_p checked for a memory with a POST_INC
    or REG address, but it didn't check what kind of register was
    being used.  This meant that it allowed DImode FPRs as well as GPRs.

    I wondered about rewriting it to use aarch64_classify_address,
    but this one-line fix seemed simpler.  The structure then mirrors
    the existing early exit in aarch64_classify_address itself:

      /* On LE, for AdvSIMD, don't support anything other than POST_INC or
         REG addressing.  */
      if (advsimd_struct_p
          && TARGET_SIMD
          && !BYTES_BIG_ENDIAN
          && (code != POST_INC && code != REG))
        return false;

    gcc/
            PR target/115969
            * config/aarch64/aarch64.cc (aarch64_simd_mem_operand_p): Require
            the operand to be a legitimate memory_operand.

    gcc/testsuite/
            PR target/115969
            * gcc.target/aarch64/pr115969.c: New test.