[Bug target/115830] New: [avr] Make better use of SREG in conditional jumps

gjl at gcc dot gnu.org gcc-bugzilla@gcc.gnu.org
Mon Jul 8 20:23:52 GMT 2024


https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115830

            Bug ID: 115830
           Summary: [avr] Make better use of SREG in conditional jumps
           Product: gcc
           Version: 14.1.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: gjl at gcc dot gnu.org
  Target Milestone: ---

Created attachment 58609
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=58609&action=edit
C99 test case

The avr backed could produce better code by making use of the condition code
(SREG) set by some instructions.  For example,

$ avr-gcc-14 stride.c -S -Os -dp -fno-tree-loop-optimize

volatile int v;

void loop (void)
{
    for (int i = 36; i >= 0; i -= 2)
        v = i;
}

becomes:

loop:
    ...
.L2:
    sts v+1,r25  ;  22  [c=4 l=4]  *movhi/3
    sts v,r24
    sbiw r24,2   ;  23  [c=4 l=1]  *addhi3_clobber/0
    sbrs r25,7   ;  32  [c=4 l=2]  *sbrx_branchhi
    rjmp .L2    
    ...

where insn 32 compares the sign bit with SBRS (more precisely, it skips the
next instruction when bit r25.7 (MSB of i) is set.  A more efficient code would
be like follows, as insn 23's SBIW already sets SREG.N:

loop:
    ...
.L2:
    sts v+1,r25  ;  24  [c=4 l=4]  *movhi/3
    sts v,r24
    sbiw r24,2   ;  34  [c=4 l=1]  *add.for.ccn.hi/0
    brpl .L2     ;  35  [c=4 l=1]  branch_N
    ...


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