[Bug target/115817] [AVR] Suboptimal code for zeroing SRAM byte from ISR

[dimich.dmb at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115817

--- Comment #2 from Dmytro Bagrii <dimich.dmb at gmail dot com> ---
Yes, in "regular" function single STS for storing zero is better than LDI/STS
for storing non-zero, assuming r1 is already zeroed.

If it were guaranteed that ISR cannot be invoked before libc's .init2 section,
r1 preserving and initialization are redundant, and such ISR code could consist
of two instructions only. For all vectors except reset it looks like true.