[Bug target/115725] RISC-V: Use wrong AVL for rv64gcv_zfh_zvl512b

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115725

--- Comment #15 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Robin Dapp <rdapp@gcc.gnu.org>:

https://gcc.gnu.org/g:acc3b703c05debc6276451f9daae5d0ffc797eac

commit r15-1861-gacc3b703c05debc6276451f9daae5d0ffc797eac
Author: Robin Dapp <rdapp@ventanamicro.com>
Date:   Mon Jul 1 13:37:17 2024 +0200

    RISC-V: Use tu policy for first-element vec_set [PR115725].

    This patch changes the tail policy for vmv.s.x from ta to tu.
    By default the bug does not show up with qemu because qemu's
    current vmv.s.x implementation always uses the tail-undisturbed
    policy.  With a local qemu version that overwrites the tail
    with ones when the tail-agnostic policy is specified, the bug
    shows.

    gcc/ChangeLog:

            * config/riscv/autovec.md: Add TU policy.
            * config/riscv/riscv-protos.h (enum insn_type): Define
            SCALAR_MOVE_MERGED_OP_TU.

    gcc/testsuite/ChangeLog:

            PR target/115725

            * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-1.c: Adjust
            test expectation.
            * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-2.c: Ditto.
            * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-3.c: Ditto.
            * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-4.c: Ditto.