[Bug target/59291] [SH] Group T bit related insns before combine

[olegendo at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59291

--- Comment #4 from Oleg Endo <olegendo at gcc dot gnu.org> ---
(In reply to pietro from comment #3)
> The following peehole:
> 
> (define_peephole
>   [(set (match_operand:SI 0 "arith_reg_dest")
> 	(plus:SI (match_dup 0)
>              (match_operand:SI 1 "arith_reg_operand")))
> 	(set (match_operand:SI 2 "arith_reg_dest")
> 	(plus:SI (match_dup 2)
>              (const_int 1)))]
>   "TARGET_SH1
>    && REGNO (operands[0]) == REGNO (operands[2])"
> {
>   return "sett" "\n"
> 	"\taddc	%1,%0";
> })
> 


The use of old style text based peepholes is not preferred in general.  Other
than that, reducing the live ranges of the T bit register (by grouping the
related insns closer together) should be better done much earlier, before
register allocation. (peephole pass is done way later in the optimization
flow).