[Bug target/115789] gcc miscompile itself with CFLAGS -O3 -march=rv64gcv_zvl256b

[law at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115789

Jeffrey A. Law <law at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Last reconfirmed|                            |2024-07-04
             Status|UNCONFIRMED                 |NEW
     Ever confirmed|0                           |1

--- Comment #3 from Jeffrey A. Law <law at gcc dot gnu.org> ---
Thanks.  Unfortunately GDB isn't dumping the vector regs, but I can make a
pretty good guess that this is an unaligned memory access.

=> 0x0000002aad0872a2 <record_value_for_reg(rtx, rtx_insn*, rtx)+584>: 
vsuxei64.v      v3,(a1),v1


That's the faulting instruction.  The value of a1 is:

a1             0x2aaee89f71     183323107185

So unless the vector of offsets in v1 brings the effective address to an
alignment boundary, we're looking at a store to an address that is not element
aligned.

This is a known issue with the k1/m1 cpu found in the bpi-f3.  It's also
rumored to affect the c908 found in the k230.  The various ISA specs allow this
behavior, but it's highly undesirable.

If you're using an released compiler (ie gcc-14.x.y) you might try
-mstrict-align.  If you're using a development compiler from the git repo, then
-mvector-strict-align might help.