[Bug tree-optimization/115764] New: When enabling CSE for SLP two operator nodes 526.blender_r breaks

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115764

            Bug ID: 115764
           Summary: When enabling CSE for SLP two operator nodes
                    526.blender_r breaks
           Product: gcc
           Version: 15.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: tree-optimization
          Assignee: unassigned at gcc dot gnu.org
          Reporter: rguenth at gcc dot gnu.org
  Target Milestone: ---

We have a two two-operator nodes composed from lanes in different BBs and
when CSEing the lane which is on their dominator the lane which is don't
care can have children (which do not have that don't care lane) that need
to be scheduled in a place not dominating the node:

view2d_ops.i: In function ‘view_zoomdrag_apply’:
view2d_ops.i:14:6: error: definition in block 3 does not dominate use in block
4
   14 | void view_zoomdrag_apply() {
      |      ^~~~~~~~~~~~~~~~~~~
for SSA_NAME: _33 in statement:
vect_cstore_24.16_34 = PHI <vect__5.11_18(3), _33(4)>
PHI argument
_33
for PHI node
vect_cstore_24.16_34 = PHI <vect__5.11_18(3), _33(4)>

  _10 = {_1, _1};
  view_zoomdrag_apply_dx = _1;
  U_0.0_2 = U_0;
  vectp.13_22 = vzd_15;
  vect_pretmp_13.14_28 = MEM <vector(2) float> [(float *)vectp.13_22];
  vect__12.15_32 = vect_pretmp_13.14_28 - _31;
  _30 = BIT_FIELD_REF <vect_pretmp_13.14_28, 32, 32>;
  _29 = BIT_FIELD_REF <vect_pretmp_13.14_28, 32, 0>;
  pretmp_13 = MEM[(struct View2D *)vzd_15].cur.xmin;
  _4 = _1 + pretmp_13;
  pretmp_23 = MEM[(struct View2D *)vzd_15].cur.xmax;
  if (U_0.0_2 != 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 4>; [50.00%]

  <bb 3> [local count: 536870912]:
  mval_fac_20 = BLI_rctf_size_x_rct_1;
  ofs_21 = _1 * mval_fac_20;
  _6 = {ofs_21, _30};
  _9 = {_29, ofs_21};
  vect__7.10_3 = _9 - _10;
  vect__4.9_11 = _9 + _10;
  _33 = VEC_PERM_EXPR <vect__4.9_11, vect__12.15_32, { 0, 3 }>;
  _19 = VEC_PERM_EXPR <vect__4.9_11, vect__7.10_3, { 0, 3 }>;
  vect__5.11_18 = _19 + _6;
  _5 = _4 + ofs_21;
  _7 = ofs_21 - _1;
  _8 = _7 + pretmp_23;
  goto <bb 5>; [100.00%]

  <bb 4> [local count: 536870912]:
  _12 = pretmp_23 - _1;

  <bb 5> [local count: 1073741824]:
  # cstore_24 = PHI <_5(3), _4(4)>
  # cstore_25 = PHI <_8(3), _12(4)>
  # vect_cstore_24.16_34 = PHI <vect__5.11_18(3), _33(4)>
  vectp.18_35 = vzd_15;
  MEM <vector(2) float> [(float *)vectp.18_35] = vect_cstore_24.16_34;
  return;