[Bug target/115733] New: [avr] Improve __memx address handling

[gjl at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115733

            Bug ID: 115733
           Summary: [avr] Improve __memx address handling
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: gjl at gcc dot gnu.org
  Target Milestone: ---

extern const __memx long vals4[];
extern const __memx char vals1[];

long load4_0 (void) { return vals4[0]; }
long load4_1 (void) { return vals4[1]; }

char load1_0 (void) { return vals1[0]; }
char load1_1 (void) { return vals1[1]; }

The code above uses PSImode addresses, which cannot be held in the Z register,
the register that has to be used in __memx accesses.  Currently, non-REG
addresses are loaded to a reg, which causes additional copying.  For example,
with v14 the function load4_0 compiles -Os -mmcu=atmega8 -d as:

load4_0:
        ldi r24,lo8(vals4)       ;  18  [c=4 l=3]  *movpsi/4
        ldi r25,hi8(vals4)
        ldi r26,hlo8(vals4)
        movw r30,r24     ;  19  [c=4 l=1]  *movhi/0
        mov r21,r26      ;  20  [c=4 l=1]  movqi_insn/0
        rcall __xload_4  ;  21  [c=16 l=1]  *xload_si_libgcc
/* epilogue start */
        ret              ;  24  [c=0 l=1]  return

Symbol "vals4" is first loaded to PSI:24, and the the lo16 part is copied to Z
and the hlo8 part to elsewhere.  The code could be like:

load4_0:
        ldi r30,lo8(vals4)       ;  13  [c=4 l=2]  *set_z_lo16
        ldi r31,hi8(vals4)
        ldi r21,hh8(vals4)       ;  15  [c=4 l=1]  *set_reg_hh8
        rcall __xload_4  ;  19  [c=16 l=1]  *xload_si_libgcc
/* epilogue start */
        ret              ;  22  [c=0 l=1]  return