[Bug target/96342] [SVE] Add support for "omp declare simd"

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96342

--- Comment #19 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Tamar Christina <tnfchris@gcc.gnu.org>:

https://gcc.gnu.org/g:89b2c7dc96c4944c306131b665a4738a8a99413e

commit r15-6393-g89b2c7dc96c4944c306131b665a4738a8a99413e
Author: Tamar Christina <tamar.christina@arm.com>
Date:   Fri Dec 20 14:34:32 2024 +0000

    AArch64: Implement vector concat of partial SVE vectors [PR96342]

    This patch adds support for vector constructor from two partial SVE vectors
into
    a full SVE vector. It also implements support for the standard vec_init
obtab to
    do this.

    gcc/ChangeLog:

            PR target/96342
            * config/aarch64/aarch64-protos.h
            (aarch64_sve_expand_vector_init_subvector): New.
            * config/aarch64/aarch64-sve.md (vec_init<mode><Vhalf>): New.
            (@aarch64_pack_partial<mode>): New.
            * config/aarch64/aarch64.cc
(aarch64_sve_expand_vector_init_subvector): New.
            * config/aarch64/iterators.md (SVE_NO2E): New.
            (VHALF, Vhalf): Add SVE partial vectors.

    gcc/testsuite/ChangeLog:

            PR target/96342
            * gcc.target/aarch64/vect-simd-clone-2.c: New test.