[Bug rtl-optimization/48696] Horrible bitfield code generation on x86

[konstantinos.eleftheriou at vrull dot eu]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=48696

Konstantinos Eleftheriou <konstantinos.eleftheriou at vrull dot eu> changed:

           What    |Removed                     |Added
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                 CC|                            |konstantinos.eleftheriou@vr
                   |                            |ull.eu

--- Comment #19 from Konstantinos Eleftheriou <konstantinos.eleftheriou at vrull dot eu> ---
Cases similar to this are now handled by the avoid-store-forwarding pass. But,
cases like the one provided are rejected due to restrictions on having memory
expressions inside the store's operands (see "andb $-64, (%rdi)"). A simple
solution to this would be moving or adding another instance of the
avoid-store-forwarding pass before "combine".

By doing this, we generate:

movzbl  (%rdi), %edx
movl    (%rdi), %eax
andl    $-64, %edx
movb    %dl, %al
movb    %dl, (%rdi)
shrl    $6, %eax    
movzwl  %ax, %eax   
ret

The two loads could be optimized, given that the small load is contained in the
larger one. This could be handled by "reload" if we extend the size of the
small load to the size of the large one.

BTW, the issue for this test case is not present in AArch64, which generates
the following with -O2:

ldr     w1, [x0]
and     w1, w1, -64
str     w1, [x0]
ubfx    x0, x1, 6, 16
ret