[Bug tree-optimization/112694] RISC-V: zve64d testing expose many ICE on C/C++ testing

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112694

--- Comment #8 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Robin Dapp <rdapp@gcc.gnu.org>:

https://gcc.gnu.org/g:99eef0cfa56573c32b9c0a1e43519ee4300ac63f

commit r15-6279-g99eef0cfa56573c32b9c0a1e43519ee4300ac63f
Author: Robin Dapp <rdapp@ventanamicro.com>
Date:   Fri Sep 6 16:04:03 2024 +0200

    vect: Do not try to duplicate_and_interleave one-element mode.

    PR112694 shows that we try to create sub-vectors of single-element
    vectors because can_duplicate_and_interleave_p returns true.
    The problem resurfaced in PR116611.

    This patch makes can_duplicate_and_interleave_p return false
    if count / nvectors > 0 and removes the corresponding check in the riscv
    backend.

    This partially gets rid of the FAIL in slp-19a.c.  At least when built
    with cost model we don't have LOAD_LANES anymore.  Without cost model,
    as in the test suite, we choose a different path and still end up with
    LOAD_LANES.

    Bootstrapped and regtested on x86 and power10, regtested on
    rv64gcv_zvfh_zvbb.  Still waiting for the aarch64 results.

    Regards
     Robin

    gcc/ChangeLog:

            PR target/112694
            PR target/116611.

            * config/riscv/riscv-v.cc (expand_vec_perm_const): Remove early
            return.
            * tree-vect-slp.cc (can_duplicate_and_interleave_p): Return
            false when we cannot create sub-elements.