[Bug target/118057] RISC-V: Can't vectorize load and store with zvl128b

[rdapp at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118057

--- Comment #2 from Robin Dapp <rdapp at gcc dot gnu.org> ---
I think depending on the performance of strided loads/stores this can be
profitable to vectorize.  Looks like we need loop versioning to account for the
possible aliasing but once this is out of the way we could be OK.

I have a local patch that uses strided stores here (in the limited example) but
that's GCC 16 material.