[Bug target/117990] [15] RISC-V: Miscompile at -O3 zvl 256 since r15-4746-g30435cc2610

[pan2.li at intel dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117990

--- Comment #2 from Li Pan <pan2.li at intel dot com> ---
(In reply to Patrick O'Neill from comment #1)
> -flto can be replaced with -fwhole-program:
> 
> -march=rv64gcv_zvl256b -fwhole-program -O3 -mrvv-vector-bits=zvl test.c -o
> user-config.out

Confirmed, reproduced by given whole-program or lto.