[Bug target/117675] [14/15 regression] ARM Cortex 7-A ldrd register overlap

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117675

--- Comment #5 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Wilco Dijkstra <wilco@gcc.gnu.org>:

https://gcc.gnu.org/g:21fbfae2e55e1a153820acc6fbd922e66f67e65b

commit r15-6088-g21fbfae2e55e1a153820acc6fbd922e66f67e65b
Author: Wilco Dijkstra <wilco.dijkstra@arm.com>
Date:   Tue Dec 10 14:22:48 2024 +0000

    arm: Fix LDRD register overlap [PR117675]

    The register indexed variants of LDRD have complex register overlap
constraints
    which makes them hard to use without using output_move_double (which can't
be
    used for atomics as it doesn't guarantee to emit atomic LDRD/STRD when
required).
    Add a new predicate and constraint for plain LDRD/STRD with base or
base+imm.
    This blocks register indexing and fixes PR117675.

    gcc:
            PR target/117675
            * config/arm/arm.cc (arm_ldrd_legitimate_address): New function.
            * config/arm/arm-protos.h (arm_ldrd_legitimate_address): New
prototype.
            * config/arm/constraints.md: Add new Uo constraint.
            * config/arm/predicates.md (arm_ldrd_memory_operand): Add new
predicate.
            * config/arm/sync.md (arm_atomic_loaddi2_ldrd): Use
            arm_ldrd_memory_operand and Uo.

    gcc/testsuite:
            PR target/117675
            * gcc.target/arm/pr117675.c: Add new test.