[Bug target/112092] RISC-V: Suboptimal RVV code produced for vsetvl-11.c and vsetvlmax-8.c

[deminhan at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112092

--- Comment #15 from Demin Han <deminhan at gcc dot gnu.org> ---
(In reply to Maciej W. Rozycki from comment #14)
> This is invalid code, because you haven't told GCC your inline assembly
> makes use of v8 or v24.  You need to specify inputs and outputs correctly
> or otherwise the compiler will consider these registers unchanged by the
> asm statements and may even insert other code between the statements that
> makes use of v8 or v24.
> 
> Does the issue still trigger with the inputs and outputs corrected?

Hi,

I think this is not related to register.
vfmacc.vv is illegal instruction when SEW=8 currently.
vsetvl pass can't change the sew and lmul accordingly because of inline asm.

Regards,
Demin