[Bug rtl-optimization/114810] [14 Regression] internal compiler error: in lra_split_hard_reg_for, at lra-assigns.cc:1868 (unable to find a register to spill) {*andndi3_doubleword_bmi} with -m32 -mstackrealign -O2 -mbmi -fno-exceptions -fno-plt

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114810

--- Comment #10 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
(In reply to Jakub Jelinek from comment #8)
> So, given the known ia32 register starvation, can't we split that first
> alternative to
> =&r,r,o with "nox64" isa and =&r,r,ro with "x64" isa?

Better make it a
(define_mode_attr andn_ro [(DI "o") (TI "ro")])
and use <andn_ro> instead of the first ro (or some better name).