[Bug middle-end/112572] [14 regression] LLVM miscompiled since r14-5355-g3cd3a09b3f91a1

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112572

--- Comment #21 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
So originally we had in vzeroupper:
```
(insn # # # 2 (set (reg/f:DI 43 r15 [orig:126 _84 ] [126])
        (reg/f:DI 2 cx [orig:126 _84 ] [126]))
"/home/sam/git/llvm-project/llvm/include/llvm/ADT/SmallVector.h":272:42 discrim
2# {*movdi_internal}
     (expr_list:REG_UNUSED (reg/f:DI 43 r15 [orig:126 _84 ] [126])
        (nil)))
(insn # # # 2 (set (reg/f:DI 43 r15 [orig:126 _84 ] [126])
        (reg/f:DI 2 cx [orig:126 _84 ] [126]))
"/tmp/build/include/c++/14.0.0/bits/stl_algo.h":1897:7# {*movdi_internal}
     (expr_list:REG_DEAD (reg/f:DI 2 cx [orig:126 _84 ] [126])
        (nil)))
```
And then in postreload we changed it to just:
```
(insn # # # 2 (set (reg/f:DI 43 r15 [orig:126 _84 ] [126])
        (reg/f:DI 2 cx [orig:126 _84 ] [126]))
"/home/sam/git/llvm-project/llvm/include/llvm/ADT/SmallVector.h":272:42 discrim
2# {*movdi_internal}
     (expr_list:REG_UNUSED (reg/f:DI 43 r15 [orig:126 _84 ] [126])
        (nil)))
```
Without updating the REG notes there. I suspect if we moved vzeroupper after
postreload it would also just had worked. reload/LRA looks like it likes to
generate extra moves that do the same thing ...
Moving vzeroupper after postreload will also reduce memory and compile time due
to less REG_DEAD/REG_UNUSED being generated ...