[Bug target/112561] [14 Regression] Segfault only on RISC-V vector
juzhe.zhong at rivai dot ai
gcc-bugzilla@gcc.gnu.org
Thu Nov 16 09:01:31 GMT 2023
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112561
JuzheZhong <juzhe.zhong at rivai dot ai> changed:
What |Removed |Added
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CC| |juzhe.zhong at rivai dot ai
--- Comment #1 from JuzheZhong <juzhe.zhong at rivai dot ai> ---
Confirm:
1019a: ccf17057 vsetivli zero,2,e16,mf2,ta,ma
1019e: e4b6 sd a3,72(sp)
101a0: e207d087 vlseg8e16.v v1,(a5)
101a4: 0cf078d7 vsetvli a7,zero,e16,mf2,ta,ma
101a8: 0208d0a7 vse16.v v1,(a7)
The vsetvli a7,zero is setting incorrect a7 VL.
It may be VSETVL PASS or AVL PROP PASS bug.
I will fix it.
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