[Bug target/112540] [14 regression] ICE in extract_insn, at recog.cc:2804 since r14-5456-gb42a09b258c3ed

cvs-commit at gcc dot gnu.org gcc-bugzilla@gcc.gnu.org
Wed Nov 15 15:12:07 GMT 2023


https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112540

--- Comment #5 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Uros Bizjak <uros@gcc.gnu.org>:

https://gcc.gnu.org/g:deff85c1e490c5594eb626697b8052a4e555e51b

commit r14-5500-gdeff85c1e490c5594eb626697b8052a4e555e51b
Author: Uros Bizjak <ubizjak@gmail.com>
Date:   Wed Nov 15 16:11:30 2023 +0100

    i386: Fix strict_low_part QImode insn with high input register patterns
[PR112540]

            PR target/112540

    gcc/ChangeLog:

            * config/i386/i386.md (*addqi_ext<mode>_1_slp):
            Correct operand numbers in split pattern.  Replace !Q constraint
            of operand 1 with !qm.  Add insn constrain.
            (*subqi_ext<mode>_1_slp): Ditto.
            (*<any_logic:code>qi_ext<mode>_1_slp): Ditto.


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