[Bug target/108599] [12/13 Regression] Incorrect code generation newer intel architectures

jakub at gcc dot gnu.org gcc-bugzilla@gcc.gnu.org
Mon Jan 30 14:00:38 GMT 2023


https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108599

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |ASSIGNED

--- Comment #4 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
More simplified:
struct S
{
  unsigned long a, b, c, d;
  S () : a(0), b(0), c(0), d(0) {}
  S bar (unsigned long val) { a += val; return *this; }
  S baz (unsigned long val) { b += val; return *this; }
};

__attribute__((noipa)) void
foo (unsigned long x, unsigned long y, unsigned long z, unsigned long w, const
S s)
{
  if (s.a != x || s.b != y || s.c != z || s.d != w)
    __builtin_abort ();
}

int
main ()
{
  foo (16, 0, 0, 0, S ().bar (16).baz (0));
  foo (16, 16, 0, 0, S ().bar (16).baz (16));
}

It is main that is being miscompiled during RTL passes, in *.optimized we have
correct:
  MEM <vector(4) long unsigned int> [(void *)&D.3337] = { 16, 0, 0, 0 };
  foo (16, 0, 0, 0, D.3337);
  MEM <vector(4) long unsigned int> [(void *)&D.3338] = { 16, 16, 0, 0 };
  foo (16, 16, 0, 0, D.3338);
but what is actually passed in the second case is { 16, 16, 16, 16 }.
I'll have a look.


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