[Bug target/112929] [14] RISC-V vector: Variable clobbered at runtime

[patrick at rivosinc dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112929

--- Comment #2 from Patrick O'Neill <patrick at rivosinc dot com> ---
I tried messing around with it - turns out passing the 'b' variable isn't
required:

https://godbolt.org/z/EKa15xqYP

Using a variadic function reproduces the problem:

https://godbolt.org/z/n95sxY1Y8

After recompiling with the new source the behavior persists with any variadic
function:
> QEMU_CPU=rv64,vlen=128,v=true,vext_spec=v1.0 /scratch/tc-testing/tc-dec-8-trunk/build-rv64gcv/bin/qemu-riscv64 rv64gc.out
m: 5
> QEMU_CPU=rv64,vlen=128,v=true,vext_spec=v1.0 /scratch/tc-testing/tc-dec-8-trunk/build-rv64gcv/bin/qemu-riscv64 rv64gcv.out
m: 0