[Bug target/112817] RISC-V: RVV: provide a preprocessor macro for VLS codegen

[juzhe.zhong at rivai dot ai]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112817

--- Comment #5 from JuzheZhong <juzhe.zhong at rivai dot ai> ---
Support VLS codegen with -mrvv-vector-bits and attribute is reasonable to be
landed on GCC-14.

But currently we are busy with fixing bugs (me, Robin, Lixu@eswin, Li
Pan@intel).
You can see gcc-patch list...


Could you first implement -mrvv-vector-bits feature ?

I have support it in rvv-next, but I don't have time to migrate that into trunk
GCC.