[Bug target/111234] RISC-V: ICE in vsetvl pass

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111234

--- Comment #2 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The trunk branch has been updated by Lehua Ding <lhtin@gcc.gnu.org>:

https://gcc.gnu.org/g:ac55f9710fe82a4ed8cb132f57303775ce60e5d1

commit r14-3583-gac55f9710fe82a4ed8cb132f57303775ce60e5d1
Author: Lehua Ding <lehua.ding@rivai.ai>
Date:   Wed Aug 30 17:48:00 2023 +0800

    RISC-V: Fix vsetvl pass ICE

    This patch fix pr111234 (a vsetvl pass ICE) when fuse a mask any
    vlmax vsetvl_vtype_change_only insn with a mu vsetvl insn.

            PR target/111234

    gcc/ChangeLog:

            * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Remove condition.

    gcc/testsuite/ChangeLog:

            * gcc.target/riscv/rvv/vsetvl/pr111234.c: New test.