[Bug testsuite/107240] [13 Regression] FAIL: gcc.dg/vect/vect-bitfield-write-2.c since r13-3219-g25413fdb2ac249

[linkw at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107240

Kewen Lin <linkw at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |linkw at gcc dot gnu.org

--- Comment #6 from Kewen Lin <linkw at gcc dot gnu.org> ---
The reason why it fails on power7 is that power7 misses the vector/vector shift
support for V2DImode (type vector(2) long unsigned int), the support querying
is for the gimple statement:

  patt_25 = 5 << 28;

It's expected since vsld is supported till ISA 2.07 (power8) (Note that we have
vslb/vslh/vslw since ISA 2.03).

But you might have noticed that both shifted value and shifting count are
constants for this particular test case, so it doesn't need the actual
vector/vector shift target support here. One tiny enhancement as below can make
us not need to special case this for Power port.

diff --git a/gcc/tree-vect-patterns.cc b/gcc/tree-vect-patterns.cc
index 0cc315d3126..01d043a3d18 100644
--- a/gcc/tree-vect-patterns.cc
+++ b/gcc/tree-vect-patterns.cc
@@ -2115,9 +2115,10 @@ vect_recog_bit_insert_pattern (vec_info *vinfo,
stmt_vec_info stmt_info,
   tree shifted = value;
   if (shift_n)
     {
+      tree shifted_value = fold_build2 (LSHIFT_EXPR, container_type, value,
shift);
       pattern_stmt
         = gimple_build_assign (vect_recog_temp_ssa_var (container_type),
-                               LSHIFT_EXPR, value, shift);
+                               shifted_value);
       append_pattern_def_seq (vinfo, stmt_info, pattern_stmt);
       shifted = gimple_get_lhs (pattern_stmt);
     }