[Bug tree-optimization/107090] [aarch64] sequence logic should be combined with mul and umulh

zhongyunde at huawei dot com gcc-bugzilla@gcc.gnu.org
Wed Oct 12 13:36:59 GMT 2022


https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107090

--- Comment #8 from vfdff <zhongyunde at huawei dot com> ---
hi @Andrew Pinski
  For the 2nd issue, I also matched the huge pattern, but it need return two
value, it seems don't work with current framework? so should I have to split it
into two simples to match the high and low values of ResHi and ResLo
separately?
```
 (i64 ResLo, i64 ResHi) = Mul64(i64 In0, i64 In1) {
    In0Hi = In0(D) & 4294967295;
    In0Lo = In0(D) >> 32;
    In1Hi = In1(D) & 4294967295;
    In1Lo = In1(D) >> 32;
    Mull_01 = In0Lo * In1Hi;
    Addc = In0Hi * In1Lo + Mull_01;
    addc32 = Addc << 32;
    ResLo = In0Hi * In1Hi + addc32;
    ResHi = ((long unsigned int) (addc32 > ResLo)) + In0Lo * In1Lo +
             (((long unsigned int) (Mull_01 > Addc)) << 32) + (Addc >> 32);
 }
```


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