[Bug target/107185] [13 Regression] during RTL pass: vregs ICE: in extract_insn, at recog.cc:2791 (unrecognizable insn) with -ffast-math and lrintf()

[crazylht at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107185

--- Comment #1 from Hongtao.liu <crazylht at gmail dot com> ---
Looks like there's mismatch between

20147(define_expand "lrint<MODEF:mode><SWI48:mode>2"
20148  [(set (match_operand:SWI48 0 "nonimmediate_operand")
20149     (unspec:SWI48 [(match_operand:MODEF 1 "register_operand")]
20150                   UNSPEC_FIX_NOTRUNC))]
20151  "SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH")

and

7770(define_insn "sse_cvtss2si<rex64namesuffix>_2"
 7771  [(set (match_operand:SWI48 0 "register_operand" "=r,r")
 7772        (unspec:SWI48 [(match_operand:SF 1 "nonimmediate_operand" "v,m")]
 7773                      UNSPEC_FIX_NOTRUNC))]
...
...
 8215(define_insn "sse2_cvtsd2si<rex64namesuffix>_2"
 8216  [(set (match_operand:SWI48 0 "register_operand" "=r,r")
 8217        (unspec:SWI48 [(match_operand:DF 1 "nonimmediate_operand" "v,m")]
 8218                      UNSPEC_FIX_NOTRUNC))]
 8219  "TARGET_SSE2"
 8220  "%vcvtsd2si<rex64suffix>\t{%1, %0|%0, %q1}"

Need to swap predicates for operands[0] and operand[1] of
"lrint<MODEF:mode><SWI48:mode>2"