[Bug tree-optimization/105094] [10/11/12 Regression] UBSAN in clear_bit_region(unsigned char*, unsigned int, unsigned int) (gimple-ssa-store-merging.cc:1834)

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105094

--- Comment #4 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-11 branch has been updated by Jakub Jelinek
<jakub@gcc.gnu.org>:

https://gcc.gnu.org/g:5c4767659c817dc4cec897215ca8f9ea930e309e

commit r11-9740-g5c4767659c817dc4cec897215ca8f9ea930e309e
Author: Jakub Jelinek <jakub@redhat.com>
Date:   Wed Mar 30 10:21:16 2022 +0200

    store-merging: Avoid ICEs on roughly ~0ULL/8 sized stores [PR105094]

    On the following testcase on 64-bit targets, store-merging sees
    a MEM_REF store from {} ctor with "negative" bitsize where bitoff + bitsize
    wraps around to very small end offset.  This later confuses the code
    so that it allocates just a few bytes of memory but fills in huge amounts
of
    it.  Later on there is a param_store_merging_max_size size check but due to
    the wrap-around we pass that.

    The following patch punts on such large bitsizes.

    2022-03-30  Jakub Jelinek  <jakub@redhat.com>

            PR tree-optimization/105094
            * gimple-ssa-store-merging.c (mem_valid_for_store_merging): Punt if
            bitsize <= 0 rather than just == 0.

            * gcc.dg/pr105094.c: New test.

    (cherry picked from commit 387e818cda0ffde86f624228c3da1ab28f453685)