[Bug target/105966] x86: operations on certain few-element vectors yield very inefficient code

jbeulich at suse dot com gcc-bugzilla@gcc.gnu.org
Tue Jun 14 09:32:50 GMT 2022


--- Comment #4 from jbeulich at suse dot com ---
(In reply to Richard Biener from comment #3)
> Is not having AVX512VL relevant in the real world?

Wasn't the Xeon-Phi line of processors lacking VL? I have no idea how
widespread their use (still) is, though.

>  Some operations (division) require different handling than zero-extending,
> masking might be a way out but that might turn out to be (way?) more expensive.

By expensive, you mean in terms of compiler changes? I wouldn't expect
execution to be severely affected by using masking, especially when it's
zeroing-masking. Or if it is, then likely because there was not enough pressure
to make this mode work efficiently (after all there were various performance
quirks when AVX and AVX512F were first introduced).

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