[Bug tree-optimization/104480] [12 Regression] Combining stores across memory locations might violate [intro.memory]/3

[redi at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104480

--- Comment #4 from Jonathan Wakely <redi at gcc dot gnu.org> ---
(In reply to Marc Mutz from comment #0)
> the movl might not be atomic, even on x86, and then a different core may
> observe the writes out of order, which probably shouldn't happen.

Nothing in your code imposes an ordering on those stores. Another thread cannot
observe it, because you are using non-atomic operations.

If you want a specific order, you need to use atomics (or volatile, but that
would be the wrong solution).