[Bug target/104458] [11/12 Regression] ICE: SIGSEGV in gen_udivmodhiqi3 -> copy_rtx with -O1 -m8bit-idiv
cvs-commit at gcc dot gnu.org
gcc-bugzilla@gcc.gnu.org
Wed Feb 9 22:43:04 GMT 2022
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104458
--- Comment #4 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-10 branch has been updated by Uros Bizjak <uros@gcc.gnu.org>:
https://gcc.gnu.org/g:983b7bcdd048650b193aad6018042b21626b89eb
commit r10-10444-g983b7bcdd048650b193aad6018042b21626b89eb
Author: Uros Bizjak <ubizjak@gmail.com>
Date: Wed Feb 9 23:40:55 2022 +0100
i386: Force inputs to a register to avoid lowpart_subreg failure [PR104458]
Input operands can be in the form of:
(subreg:DI (reg:V2SF 96) 0)
which chokes lowpart_subreg. Force inputs to a register, which is
preferable even when the input operand is from memory.
2022-02-09 Uroš Bizjak <ubizjak@gmail.com>
gcc/ChangeLog:
PR target/104458
* config/i386/i386-expand.c (ix86_split_idivmod):
Force operands[2] and operands[3] into a register..
gcc/testsuite/ChangeLog:
PR target/104458
* gcc.target/i386/pr104458.c: New test.
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