[Bug target/108185] [RISC-V]RVV assemble not set vsetvli correct.

[kito at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108185

Kito Cheng <kito at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |kito at gcc dot gnu.org

--- Comment #2 from Kito Cheng <kito at gcc dot gnu.org> ---
It seems right to me?


```
$ riscv64-unknown-elf-gcc pr108185.c -march=rv64gcv -mabi=lp64d -O3 -S   -o - 
        .file   "pr108185.c"
        .option nopic
        .attribute arch,
"rv64i2p0_m2p0_a2p0_f2p0_d2p0_c2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0"
        .attribute unaligned_access, 0
        .attribute stack_align, 16
        .text
        .align  1
        .globl  foo5_3
        .type   foo5_3, @function
foo5_3:
        csrr    t0,vlenb
        slli    t1,t0,1
        csrr    a5,vlenb
        sub     sp,sp,t1
        slli    a3,a5,1
        add     a3,a3,sp
        vl1re8.v        v25,0(a0)     # Load value from *(vint8m1_t*)in
        sub     a5,a3,a5
        vs1r.v  v25,0(a1)             # Store value to *(vint8m1_t*)out
        vs1r.v  v25,0(a5)             # Store value to stack, although it's
unused.
        addi    a4,a1,800
        csrr    t0,vlenb
        slli    t1,t0,1
        vsetvli a5,zero,e8,m1,ta,ma   # Right vsetvli for vsm.v
        vsm.v   v25,0(a4)
        add     sp,sp,t1
        jr      ra
        .size   foo5_3, .-foo5_3
        .ident  "GCC: (g44b22ab81cf) 13.0.0 20221229 (experimental)"
```