[Bug rtl-optimization/90706] [10/11/12/13 Regression] Useless code generated for stack / register operations on AVR

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90706

--- Comment #15 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Vladimir Makarov <vmakarov@gcc.gnu.org>:

https://gcc.gnu.org/g:12abd5a7d13209f79664ea603b3f3517f71b8c4f

commit r13-4727-g12abd5a7d13209f79664ea603b3f3517f71b8c4f
Author: Vladimir N. Makarov <vmakarov@redhat.com>
Date:   Thu Dec 15 14:11:05 2022 -0500

    IRA: Check that reg classes contain a hard reg of given mode in reg move
cost calculation

    IRA calculates wrong AVR costs for moving general hard regs of SFmode.  To
    calculate the costs we did not exclude sub-classes which do not contain
    hard regs of given mode.  This was the reason for spilling a pseudo in the
    PR. The patch fixes this.

            PR rtl-optimization/90706

    gcc/ChangeLog:

            * ira-costs.cc: Include print-rtl.h.
            (record_reg_classes, scan_one_insn): Add code to print debug info.
            * ira.cc (ira_init_register_move_cost): Check that at least one
hard
            reg of the mode are in the class contents to calculate the
            register move costs.

    gcc/testsuite/ChangeLog:

            * gcc.target/avr/pr90706.c: New.