[Bug target/104474] [10/11 Regression] ICE: in output_constant_pool_2, at varasm.cc:4062 with -mcpu=neoverse-512tvb -msve-vector-bits=512
cvs-commit at gcc dot gnu.org
gcc-bugzilla@gcc.gnu.org
Thu Apr 7 09:53:45 GMT 2022
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104474
--- Comment #7 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-11 branch has been updated by Richard Biener
<rguenth@gcc.gnu.org>:
https://gcc.gnu.org/g:b8a6fb4b5919140de74fbc6ad6df1a9caba1c9ec
commit r11-9783-gb8a6fb4b5919140de74fbc6ad6df1a9caba1c9ec
Author: Andrew Pinski <apinski@marvell.com>
Date: Wed Feb 9 14:56:58 2022 -0800
[COMMITTED] Fix PR aarch64/104474: ICE with vector float initializers and
non-consts.
The problem here is that the aarch64 back-end was placing const0_rtx
into the constant vector RTL even if the mode was a floating point mode.
The fix is instead to use CONST0_RTX and pass the mode to select the
correct zero (either const_int or const_double).
Committed as obvious after a bootstrap/test on aarch64-linux-gnu with
no regressions.
PR target/104474
gcc/ChangeLog:
* config/aarch64/aarch64.c
(aarch64_sve_expand_vector_init_handle_trailing_constants):
Use CONST0_RTX instead of const0_rtx for the non-constant elements.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/sve/pr104474-1.c: New test.
* gcc.target/aarch64/sve/pr104474-2.c: New test.
* gcc.target/aarch64/sve/pr104474-3.c: New test.
(cherry picked from commit 41582f88ec01c5ce2f85ebc4ac2743eb426d6e33)
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