[Bug target/99960] MVE: Wrong code storing V2DI vector

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99960

--- Comment #3 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Alex Coplan <acoplan@gcc.gnu.org>:

https://gcc.gnu.org/g:7596c762137f26f495b53ec93471273887832e31

commit r12-654-g7596c762137f26f495b53ec93471273887832e31
Author: Alex Coplan <alex.coplan@arm.com>
Date:   Mon May 10 09:46:45 2021 +0100

    arm: Fix wrong code with MVE V2DImode loads and stores [PR99960]

    As the PR shows, we currently miscompile V2DImode loads and stores for
    MVE.  We're currently using 64-bit loads/stores, but need to be using
    128-bit vector loads and stores. Fixed thusly.

    Some intrinsics tests were checking that we (incorrectly) used the
    64-bit loads/stores: these have been updated.

    gcc/ChangeLog:

            PR target/99960
            * config/arm/mve.md (*mve_mov<mode>): Simplify output code. Use
            vldrw.u32 and vstrw.32 for V2D[IF]mode loads and stores.

    gcc/testsuite/ChangeLog:

            PR target/99960
            * gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c:
            Update now that we're (correctly) using full 128-bit vector
            loads/stores.
            * gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c:
            Likewise.
            * gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_s64.c:
            Likewise.
            * gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_u64.c:
            Likewise.
            * gcc.target/arm/mve/intrinsics/vuninitializedq_int.c: Likewise.
            * gcc.target/arm/mve/intrinsics/vuninitializedq_int1.c:
            Likewise.