[Bug target/99195] Optimise away vec_concat of 64-bit AdvancedSIMD operations with zeroes in aarch64

[ktkachov at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99195

--- Comment #1 from ktkachov at gcc dot gnu.org ---
Using a define_subst like:
(define_subst "add_vec_concat_subst"
  [(set (match_operand:VDMOV 0 "" "")
        (match_operand:VDMOV 1 "" ""))]
  "!BYTES_BIG_ENDIAN"
  [(set (match_operand:<VDBL> 0 "register_operand" "=w")
        (vec_concat:<VDBL>
         (match_dup 1)
         (match_operand:VDMOV 2 "aarch64_simd_or_scalar_imm_zero")))]
)

(define_subst_attr "add_vec_concat" "add_vec_concat_subst" "" "_vec_concat")

and adding it to patterns in aarch64-simd.md through <add_vec_concat> seems to
work. It doesn't handle the big-endian case, but maybe we can handle that
separately (or with a second define_subst?)

Does this approach make sense?